Winbagility 1 year ago
parent
commit
27173eff02
5 changed files with 1586 additions and 0 deletions
  1. BIN
      diibugger/__pycache__/disassemble.cpython-35.pyc
  2. 343
    0
      diibugger/disassemble.py
  3. 1241
    0
      diibugger/main.py
  4. 1
    0
      start.bat
  5. 1
    0
      startDiibugger.bat

BIN
diibugger/__pycache__/disassemble.cpython-35.pyc View File


+ 343
- 0
diibugger/disassemble.py View File

@@ -0,0 +1,343 @@
1
+
2
+condition_table_true = ["lt", "gt", "eq"]
3
+condition_table_false = ["ge", "le", "ne"]
4
+trap_condition_table = {
5
+    1: "lgt",
6
+    2: "llt",
7
+    4: "eq",
8
+    5: "lge",
9
+    8: "gt",
10
+    12: "ge",
11
+    16: "lt",
12
+    20: "le",
13
+    31: "u"
14
+}
15
+
16
+spr_table = {
17
+    8: "lr",
18
+    9: "ctr"
19
+}
20
+
21
+def decodeI(value):
22
+    return (value >> 2) & 0xFFFFFF, (value >> 1) & 1, value & 1
23
+
24
+def decodeB(value):
25
+    return (value >> 21) & 0x1F, (value >> 16) & 0x1F, (value >> 2) & 0x3FFF, (value >> 1) & 1, value & 1
26
+
27
+def decodeD(value):
28
+    return (value >> 21) & 0x1F, (value >> 16) & 0x1F, value & 0xFFFF
29
+
30
+def decodeX(value):
31
+    return (value >> 21) & 0x1F, (value >> 16) & 0x1F, (value >> 11) & 0x1F, (value >> 1) & 0x3FF, value & 1
32
+
33
+def extend_sign(value, bits=16):
34
+    if value & 1 << (bits - 1):
35
+        value -= 1 << bits
36
+    return value
37
+
38
+def ihex(value):
39
+    return "-" * (value < 0) + "0x" + hex(value).lstrip("-0x").rstrip("L").zfill(1).upper()
40
+
41
+def decodeCond(BO, BI):
42
+    #TODO: Better condition code
43
+    if BO == 20: return ""
44
+    if BO & 1: return "?"
45
+    if BI > 2: return "?"
46
+    if BO == 4: return condition_table_false[BI]
47
+    if BO == 12: return condition_table_true[BI]
48
+    return "?"
49
+
50
+def loadStore(value, regtype="r"):
51
+    D, A, d = decodeD(value)
52
+    d = extend_sign(d)
53
+    return "%s%i, %s(r%i)" %(regtype, D, ihex(d), A)
54
+
55
+def loadStoreX(D, A, B, pad):
56
+    if pad: return "<invalid>"
57
+    return "r%i, %s, r%i" %(D, ("r%i" %A) if A else "0", B)
58
+
59
+def add(D, A, B, Rc):
60
+    return "add%s" %("." * Rc), "r%i, r%i, r%i" %(D, A, B)
61
+
62
+def addi(value, addr):
63
+    D, A, SIMM = decodeD(value)
64
+    SIMM = extend_sign(SIMM)
65
+    if A == 0:
66
+        return "li", "r%i, %s" %(D, ihex(SIMM))
67
+    return "addi", "r%i, r%i, %s" %(D, A, ihex(SIMM))
68
+
69
+def addic(value, addr):
70
+    D, A, SIMM = decodeD(value)
71
+    SIMM = extend_sign(SIMM)
72
+    return "addic", "r%i, r%i, %s" %(D, A, ihex(SIMM))
73
+
74
+def addic_(value, addr):
75
+    D, A, SIMM = decodeD(value)
76
+    SIMM = extend_sign(SIMM)
77
+    return "addic.", "r%i, r%i, %s" %(D, A, ihex(SIMM))
78
+
79
+def addis(value, addr):
80
+    D, A, SIMM = decodeD(value)
81
+    SIMM = extend_sign(SIMM)
82
+    if A == 0:
83
+        return "lis", "r%i, %s" %(D, ihex(SIMM))
84
+    return "addis", "r%i, r%i, %s" %(D, A, ihex(SIMM))
85
+
86
+def and_(S, A, B, Rc):
87
+    return "and%s" % ("." * Rc), "r%i, r%i, r%i" % (A, S, B)
88
+
89
+def b(value, addr):
90
+    LI, AA, LK = decodeI(value)
91
+    LI = extend_sign(LI, 24) * 4
92
+    if AA:
93
+        dst = LI
94
+    else:
95
+        dst = addr + LI
96
+    return "b%s%s" %("l" * LK, "a" * AA), ihex(dst)
97
+
98
+def bc(value, addr):
99
+    BO, BI, BD, AA, LK = decodeB(value)
100
+    LI = extend_sign(LK, 14) * 4
101
+    instr = "b" + decodeCond(BO, BI)
102
+    if LK: instr += "l"
103
+    if AA:
104
+        instr += "a"
105
+        dst = LI
106
+    else:
107
+        dst = addr + LI
108
+    return instr, ihex(dst)
109
+
110
+def bcctr(BO, BI, pad, LK):
111
+    if pad: return "<invalid>"
112
+    instr = "b" + decodeCond(BO, BI) + "ctr"
113
+    if LK:
114
+        instr += "l"
115
+    return instr
116
+
117
+def bclr(BO, BI, pad, LK):
118
+    if pad: return "<invalid>"
119
+    instr = "b" + decodeCond(BO, BI) + "lr"
120
+    if LK:
121
+        instr += "l"
122
+    return instr
123
+
124
+def cmp(cr, A, B, pad):
125
+    if pad: return "<invalid>"
126
+    if cr & 3:
127
+        return "<invalid>"
128
+    return "cmp", "cr%i, r%i, r%i" %(cr >> 2, A, B)
129
+
130
+def cmpi(value, addr):
131
+    cr, A, SIMM = decodeD(value)
132
+    SIMM = extend_sign(SIMM)
133
+    if cr & 3:
134
+        return "<invalid>"
135
+    return "cmpwi", "cr%i, r%i, %s" %(cr >> 2, A, ihex(SIMM))
136
+
137
+def cmpl(cr, A, B, pad):
138
+    if pad: return "<invalid>"
139
+    if cr & 3:
140
+        return "<invalid>"
141
+    return "cmplw", "cr%i, r%i, r%i" %(cr >> 2, A, B)
142
+
143
+def cmpli(value, addr):
144
+    cr, A, UIMM = decodeD(value)
145
+    if cr & 3:
146
+        return "<invalid>"
147
+    return "cmplwi", "cr%i, r%i, %s" %(cr >> 2, A, ihex(UIMM))
148
+
149
+def cntlzw(S, A, pad, Rc):
150
+    if pad: return "<invalid>"
151
+    return "cntlzw%s" %("." * Rc), "r%i, r%i" %(A, S)
152
+
153
+def dcbst(pad1, A, B, pad2):
154
+    if pad1 or pad2: return "<invalid>"
155
+    return "dcbst", "r%i, r%i" %(A, B)
156
+
157
+def fmr(D, pad, B, Rc):
158
+    if pad: return "<invalid>"
159
+    return "fmr%s" %("." * Rc), "f%i, f%i" %(D, B)
160
+
161
+def fneg(D, pad, B, Rc):
162
+    if pad: return "<invalid>"
163
+    return "fneg%s" %("." * Rc), "f%i, f%i" %(D, B)
164
+
165
+def mfspr(D, sprLo, sprHi, pad):
166
+    if pad: return "<invalid>"
167
+    sprnum = (sprHi << 5) | sprLo
168
+    if sprnum not in spr_table:
169
+        spr = "?"
170
+    else:
171
+        spr = spr_table[sprnum]
172
+    return "mf%s" %spr, "r%i" %D
173
+
174
+def mtspr(S, sprLo, sprHi, pad):
175
+    if pad: return "<invalid>"
176
+    sprnum = (sprHi << 5) | sprLo
177
+    if sprnum not in spr_table:
178
+        spr = ihex(sprnum)
179
+    else:
180
+        spr = spr_table[sprnum]
181
+    return "mt%s" %spr, "r%i" %S
182
+
183
+def lbz(value, addr): return "lbz", loadStore(value)
184
+def lfd(value, addr): return "lfd", loadStore(value, "f")
185
+def lfs(value, addr): return "lfs", loadStore(value, "f")
186
+def lmw(value, addr): return "lmw", loadStore(value)
187
+def lwz(value, addr): return "lwz", loadStore(value)
188
+def lwzu(value, addr): return "lwzu", loadStore(value)
189
+def lwarx(D, A, B, pad): return "lwarx", loadStoreX(D, A, B, pad)
190
+def lwzx(D, A, B, pad): return "lwzx", loadStoreX(D, A, B, pad)
191
+
192
+def or_(S, A, B, Rc):
193
+    if S == B:
194
+        return "mr%s" %("." * Rc), "r%i, r%i" %(A, S)
195
+    return "or%s" %("." * Rc), "r%i, r%i, r%i" %(A, S, B)
196
+
197
+def ori(value, addr):
198
+    S, A, UIMM = decodeD(value)
199
+    if UIMM == 0:
200
+        return "nop"
201
+    return "ori", "r%s, r%s, %s" %(A, S, ihex(UIMM))
202
+
203
+def oris(value, addr):
204
+    S, A, UIMM = decodeD(value)
205
+    return "oris", "r%s, r%s, %s" %(A, S, ihex(UIMM))
206
+
207
+def rlwinm(value, addr):
208
+    S, A, SH, M, Rc = decodeX(value)
209
+    MB = M >> 5
210
+    ME = M & 0x1F
211
+    dot = "." * Rc
212
+    if SH == 0 and MB == 0 and ME == 31:
213
+        return "nop"
214
+    if MB == 0 and ME == 31 - SH:
215
+        return "slwi%s" %dot, "r%i, r%i, %i" %(A, S, SH)
216
+    if ME == 31 and SH == 32 - MB:
217
+        return "srwi%s" %dot, "r%i, r%i, %i" %(A, S, MB)
218
+    if MB == 0 and ME < 31:
219
+        return "extlwi%s" %dot, "r%i, r%i, %i,%i" %(A, S, ME + 1, SH)
220
+    #extrwi
221
+    if MB == 0 and ME == 31:
222
+        if SH >= 16:
223
+            return "rotlwi%s" %dot, "r%i, r%i, %i" %(A, S, SH)
224
+        return "rotrwi%s" %dot, "r%i, r%i, %i" %(A, S, 32 - SH)
225
+    if SH == 0 and ME == 31:
226
+        return "clrlwi%s" %dot, "r%i, r%i, %i" %(A, S, MB)
227
+    if SH == 0 and MB == 0:
228
+        return "clrrwi%s" %dot, "r%i, r%i, %i" %(A, S, 31 - ME)
229
+    #clrlslwi
230
+    return "rlwinm%s" %dot, "r%i, r%i, %i,%i,%i" %(A, S, SH, MB, ME)
231
+
232
+def sc(value, addr):
233
+    if value & 0x3FFFFFF != 2:
234
+        return "<invalid>"
235
+    return "sc"
236
+
237
+def stb(value, addr): return "stb", loadStore(value)
238
+def stfd(value, addr): return "stfd", loadStore(value, "f")
239
+def stfs(value, addr): return "stfs", loadStore(value, "f")
240
+def stfsu(value, addr): return "stfsu", loadStore(value, "f")
241
+def stmw(value, addr): return "stmw", loadStore(value)
242
+def stw(value, addr): return "stw", loadStore(value)
243
+def stwu(value, addr): return "stwu", loadStore(value)
244
+def stbx(S, A, B, pad): return "stbx", loadStoreX(S, A, B, pad)
245
+def stwx(S, A, B, pad): return "stwx", loadStoreX(S, A, B, pad)
246
+def stwcx(S, A, B, pad): return "stwcx", loadStoreX(S, A, B, pad ^ 1)
247
+
248
+def tw(TO, A, B, pad):
249
+    if pad: return "<invalid>"
250
+    if TO == 31 and A == 0 and B == 0:
251
+        return "trap"
252
+
253
+    if TO not in trap_condition_table:
254
+        condition = "?"
255
+    else:
256
+        condition = trap_condition_table[TO]
257
+    return "tw%s" %condition, "r%i, r%i" %(A, B)
258
+
259
+opcode_table_ext1 = {
260
+    16: bclr,
261
+    528: bcctr
262
+}
263
+
264
+opcode_table_ext2 = {
265
+    0: cmp,
266
+    4: tw,
267
+    20: lwarx,
268
+    23: lwzx,
269
+    26: cntlzw,
270
+    28: and_,
271
+    32: cmpl,
272
+    54: dcbst,
273
+    150: stwcx,
274
+    151: stwx,
275
+    215: stbx,
276
+    266: add,
277
+    339: mfspr,
278
+    444: or_,
279
+    467: mtspr
280
+}
281
+
282
+opcode_table_float_ext1 = {
283
+    40: fneg,
284
+    72: fmr
285
+}
286
+
287
+def ext1(value, addr):
288
+    DS, A, B, XO, Rc = decodeX(value)
289
+    if not XO in opcode_table_ext1:
290
+        return "ext1 - %s" %bin(XO)
291
+    return opcode_table_ext1[XO](DS, A, B, Rc)
292
+
293
+def ext2(value, addr):
294
+    DS, A, B, XO, Rc = decodeX(value)
295
+    if not XO in opcode_table_ext2:
296
+        return "ext2 - %s" %bin(XO)
297
+    return opcode_table_ext2[XO](DS, A, B, Rc)
298
+
299
+def float_ext1(value, addr):
300
+    D, A, B, XO, Rc = decodeX(value)
301
+    if not XO in opcode_table_float_ext1:
302
+        return "float_ext1 - %s" %bin(XO)
303
+    return opcode_table_float_ext1[XO](D, A, B, Rc)
304
+
305
+opcode_table = {
306
+    10: cmpli,
307
+    11: cmpi,
308
+    12: addic,
309
+    13: addic_,
310
+    14: addi,
311
+    15: addis,
312
+    16: bc,
313
+    17: sc,
314
+    18: b,
315
+    19: ext1,
316
+    21: rlwinm,
317
+    24: ori,
318
+    25: oris,
319
+    31: ext2,
320
+    32: lwz,
321
+    33: lwzu,
322
+    34: lbz,
323
+    36: stw,
324
+    37: stwu,
325
+    38: stb,
326
+    46: lmw,
327
+    47: stmw,
328
+    48: lfs,
329
+    50: lfd,
330
+    52: stfs,
331
+    53: stfsu,
332
+    54: stfd,
333
+    63: float_ext1
334
+}
335
+
336
+def disassemble(value, address):
337
+    opcode = value >> 26
338
+    if opcode not in opcode_table:
339
+        return "???"
340
+    instr = opcode_table[opcode](value, address)
341
+    if type(instr) == str:
342
+        return instr
343
+    return instr[0] + " " * (10 - len(instr[0])) + instr[1]

+ 1241
- 0
diibugger/main.py
File diff suppressed because it is too large
View File


+ 1
- 0
start.bat View File

@@ -0,0 +1 @@
1
+c:\Python27\python.exe -m SimpleHTTPServer 80

+ 1
- 0
startDiibugger.bat View File

@@ -0,0 +1 @@
1
+C:\Users\JmpCallPoo\AppData\Local\Programs\Python\Python35-32\python.exe diibugger/main.py